Circuitry for implementing multi-mode redundancy and arithmetic functions

摘要

Integrated circuits such as application specific integrated circuits or programmable logic devices may include multiple copies of a same circuit together with a majority vote circuit in a configuration that is sometimes also referred to as multi-mode redundancy. An adder circuit may be coupled to these multiple copies and produce a carry-out signal and a sum signal based on signals received from the multiple copies. The carry-out signal of the adder circuit may provide the result of the majority vote operation. A logic exclusive OR gate may perform a logic exclusive OR operation between the sum signal and the carry-out signal, thereby generating an error signal. The error signal may indicate that one of the multiple copies produces an output that is different than the outputs produced by the other copies.

主权项

1. An integrated circuit, comprising:
a first circuit that includes a plurality of sub-circuits, wherein at least first and second sub-circuits in the plurality of sub-circuits are functionally equivalent to a third sub-circuit in the plurality of sub-circuits; and a second circuit that receives at least three signals from the first circuit, wherein the second circuit computes a sum of the at least three signals in a first mode, wherein the second circuit produces a majority signal based on a majority vote function of the at least three signals in a second mode, wherein the first, second, and third sub-circuits produce the at least three signals and receive the same signals, and wherein the at least three signals produced by the sub-circuits are different than the signals received by the sub-circuits.