发明名称 FORMING METHOD OF ISOLATION TRENCH OF INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To realize an isolation trench structure of a semiconductor device through a simple processing avoiding damage to trench edges due to the impact of plasma ions. SOLUTION: A pad oxide layer 104 and a nitride layer laminated on a silicon substrate 102 to serve as a polish stop layer are patterned by the use of a mask 108, and a trench 110 is provided in the exposed substrate 102 by etching. Then, an oxide 120 is deposited through an inductively coupled high-density plasma enhanced deposition to fill the trench 110. Then, a chemical-mechanical polishing operation is carried out so far as to reach the pad oxide layer 104, whereby the oxide 120 is removed leaving an oxide 122 filled in the trench 110 unremoved.
申请公布号 JPH1056058(A) 申请公布日期 1998.02.24
申请号 JP19970149724 申请日期 1997.06.06
申请人 TEXAS INSTR INC <TI> 发明人 NAG SOMNATH S;CHATTERJEE AMITAVA;CHEN IH-CHIN
分类号 H01L21/76;H01L21/762;(IPC1-7):H01L21/76 主分类号 H01L21/76
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