发明名称 Ferroelectric memory with feedback circuit
摘要 A memory cell includes a ferroelectric capacitor and a transistor connected between one side of the capacitor and a bit line. A drive circuit includes an operational amplifier having an output, an inverting input, and a non-inverting input. A plate line is connected between the other side of the capacitor and the output. The non-inverting input is connected to a data-in line through a first resistor and to the bit line through a second resistor. The inverting input is connected to a constant voltage source through a third resistor, and to the plate line through a fourth resistor. A first buffer amplifier is connected between the bit line and the second resistor, and a second buffer amplifier is connected between the plate line and the fourth resistor. Voltage is connected to the other one of the operational amplifier inputs.
申请公布号 US5721699(A) 申请公布日期 1998.02.24
申请号 US19960617243 申请日期 1996.03.18
申请人 SYMETRIX CORPORATION 发明人 DEVILBISS, ALAN
分类号 G11C14/00;G11C11/22;(IPC1-7):G11C7/00 主分类号 G11C14/00
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