| 摘要 |
PROBLEM TO BE SOLVED: To provide a data weighted mean circuit capable of giving an input signal that is capable of effectively reducing an error of an analog signal caused by a property variation of circuit elements, to a DA converter even in the case where the number of circuit elements in the DA converter and the number of circuit elements to be selected have a common divisor.SOLUTION: In the case where a number M of digits of "1" in an N-bit signal S45 is a "predetermined integer" that has a common divisor with N, the signal S45 is bit-shifted in such a manner that a leading digit having a bit value of "1" in a digital signal S40 to be newly outputted is matched to a digit that is shifted from a digit next to a last digit having a bit value of "1" in a digital signal S40 outputted the last time to a high-order bit side just by "P" digits. The number P of digits to be shifted is an integer that is set in such a manner that a sum of P and the "predetermined integer" does not have a common divisor with N.SELECTED DRAWING: Figure 4 |
