发明名称 MONITOR PATTERN
摘要 PROBLEM TO BE SOLVED: To monitor dispersion in dimension of all of device formation patterns by forming monitor patterns having a plurality of step patterns so as to reproduce a step in an underlayer of a device formation pattern. SOLUTION: Monitor patterns 14a and 14b are formed by unit patterns a to p. Each of the unit patterns a to p is constructed by a rectangular SDG region pattern (low stepped pattern) A and a linear gate wiring pattern (resist film pattern) B as a target to be monitored. For example, unit patterns a, g, h, and n are formed so that the interval between two SDG region patterns A most occupying the area in an actual LSI is minimized on the layout. The gate wiring patterns B each having the narrowest gate width permitted on the design rule are formed at the narrowest spacing on the underlayer steps including the two SDG region patterns A.
申请公布号 JPH1050785(A) 申请公布日期 1998.02.20
申请号 JP19960199058 申请日期 1996.07.29
申请人 TOSHIBA CORP 发明人 HATANAKA KAZUHISA
分类号 H01L21/66;H01L23/544;(IPC1-7):H01L21/66 主分类号 H01L21/66
代理机构 代理人
主权项
地址