| 摘要 |
PROBLEM TO BE SOLVED: To allow the driving processing of a display device with a simple constitution without mixing R, G, and B data before shift registers by placing a shift register for each item of R, G and B data and driving electrodes in the order of R, G and B at the final stage of FET driving. SOLUTION: A video signal processing circuit 101 separates and extracts each of R, G, and B video signals corresponding to red, green and blue video image components from a supplied composite video signal to apply A/D conversion and signal processing to them for their storage in frame memory 106 R, G and B. Accumulated signals are sequentially read out and supplied to the shift registers respectively corresponding to the R, G and B components in the column electrode driving circuit 109 to drive the respective electrodes, D1 to D3n where the outputs of the shift registers are connected to a latch circuit in the bit order of R, G and B. On the other hand, the output signals from a synchronizing separation circuit 102 are supplied to a row electrode driving circuit 108 to drive each row electrode X1 to Xm and Y1 to Ym . |
