发明名称 ETCHING PROCESS FOR VERTICAL SIDE WALL NITRIDE
摘要 PROBLEM TO BE SOLVED: To prevent an undesired short circuit. SOLUTION: An integrated circuit treating sequence is carried out as follows. An electrically conductive structure 66, together with a silicon nitride upper layer 68 and a silicon dioxide side wall, is formed on a semiconductor substrate. A silicon nitride insulating layer 70 is deposited on the whole substrate and on the side wall and top part of the electrically conductive structure. The silicon nitride layer is etched via the silicon nitride 70 to form an opening to the surface of the semiconductor substrate 56 without rounding the shoulder of the silicon nitride 70 covering the side wall of the electrically conductive structure 66. The shoulder increases the margin for the subsequent etching treatment because the shoulder is left in a relatively rectangular shape. Subsequently deposited conductor is in contact with the surface of the semiconductor substrate 56 without making a short circuit to the electrically conductive structure 66 on the semiconductor substrate.
申请公布号 JPH1050840(A) 申请公布日期 1998.02.20
申请号 JP19970109548 申请日期 1997.04.25
申请人 TEXAS INSTR INC <TI> 发明人 MIN YAN
分类号 H01L21/28;H01L21/302;H01L21/3065;H01L21/768;H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L21/28
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