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发明名称
Halbleiteranordnung mit einem Hohlraum um eine Gate-Elektrode herum und Verfahren zur Herstellung
摘要
申请公布号
DE69316314(D1)
申请公布日期
1998.02.19
申请号
DE1993616314
申请日期
1993.10.27
申请人
MATSUSHITA ELECTRONICS CORP., TAKATSUKI, OSAKA, JP
发明人
OISHI, YOSHIRO, NISHINOMIYA-SHI, HYOGO-KEN, JP;UEDA, DAISUKE, IBARAKI-SHI, OSAKA, JP
分类号
H01L21/338;H01L23/482;H01L23/522;H01L29/06;H01L29/417;H01L29/812;(IPC1-7):H01L29/812;H01L29/41
主分类号
H01L21/338
代理机构
代理人
主权项
地址
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