发明名称 Method for forming FinFET devices
摘要 A method comprises providing a substrate formed of a first semiconductor material, wherein the substrate comprises a plurality of isolation regions, etching away upper portions of the substrate to form a plurality of trenches, wherein each trench is between two adjacent isolation regions, over-growing a plurality of semiconductor fins in the trenches over the substrate through an epitaxial growth process, wherein upper portions of the semiconductor fins are above top surfaces of the isolation regions, applying a planarization process to the semiconductor fins, wherein top surfaces of the semiconductor fins are level with top surfaces of the isolation regions as a result of performing the step of applying the planarization process and removing a defect semiconductor fin to form a vacant trench.
申请公布号 US9443729(B1) 申请公布日期 2016.09.13
申请号 US201514674589 申请日期 2015.03.31
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Duriez Blandine;Holland Martin Christopher
分类号 H01L21/02;H01L21/76;H01L21/761;H01L21/762;H01L29/66;H01L29/68;H01L29/02;H01L29/06;H01L29/78 主分类号 H01L21/02
代理机构 Slater Matsil, LLP 代理人 Slater Matsil, LLP
主权项 1. A method comprising: providing a substrate formed of a first semiconductor material, wherein the substrate comprises a plurality of isolation regions; etching away upper portions of the substrate to form a plurality of trenches, wherein each trench is between two adjacent isolation regions; over-growing a plurality of semiconductor fins in the trenches over the substrate through an epitaxial growth process, wherein upper portions of the semiconductor fins are above top surfaces of the isolation regions; applying a planarization process to the semiconductor fins, wherein top surfaces of the semiconductor fins are level with top surfaces of the isolation regions as a result of performing the step of applying the planarization process; and removing a defect semiconductor fin to form a vacant trench.
地址 Hsin-Chu TW