发明名称 |
DMOS transistor with low on-resistance and method of fabrication |
摘要 |
A DMOS transistor (50) includes an Nwell (70); a Dwell (76) formed in the Nwell (70); a source region (78) formed in the Dwell (78), a channel region (80) defined between an edge of the source region (78) and an edge of the Nwell (70); a gate (86) extending over the channel region (80); and a p+ backgate contact region (90) formed in the source region (78) so as to counterdope and extend through a first portion of the source region (78) to contact the Dwell (76). The formation of the p+ backgate contact region through the source region (78) eliminates the need for a large annular shaped source region resulting in a considerable reduction in both device area and on-resistance.
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申请公布号 |
US5719421(A) |
申请公布日期 |
1998.02.17 |
申请号 |
US19960775758 |
申请日期 |
1996.12.31 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
HUTTER, LOUIS N.;ERDELJAC, JOHN P. |
分类号 |
H01L21/336;H01L29/06;H01L29/08;H01L29/10;H01L29/78;(IPC1-7):H01L29/78 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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