| 摘要 |
PROBLEM TO BE SOLVED: To improve the parallelism of circuit operation and to speed up a multiplier. SOLUTION: Three four-input two-output addition blocks 2a to 2c and one extensive four-input two-output addition block 1a are arranged on the 1st step of the tree circuit. Two four-input two-output addition blocks 2d, 2e are arranged on the 2nd step and a four-input two-output addition block 2f is arranged on the 3rd step. The number of logical steps in the critical pass of the tree circuit is reduced by matching the arrival time of input signals to respective addition blocks on the same step. |
