发明名称 SEMICONDUCTOR PACKAGE AND MANUFACTURE THEREOF
摘要 <p>PROBLEM TO BE SOLVED: To enable leadless connection of a semiconductor package, acting as a wafer reinforcing member in a large aperture forming step of a Si wafer whereas it has quite the same size as an LSI. SOLUTION: A chip-sized semiconductor package 12 is formed such that an LSI chip 11 is held and mounted on a board and electrodes 14 of the chip 11 are connected to electrodes of the board. The chip 11 is bonded to the package 12 in one body. The package has electrodes 16 connected to electrodes of the board on the opposite surface to the chip-bonded surface. The electrodes 16 connected to those of the board in the package 12 are connected to the chip electrodes 14 through conductors 17 passing through through-holes 15 bored through the package 12 and chip 12.</p>
申请公布号 JPH1041425(A) 申请公布日期 1998.02.13
申请号 JP19960189240 申请日期 1996.07.18
申请人 NEC CORP 发明人 INATA KAZUHIRO;SHIMADA YUZO;UCHIUMI KAZUAKI
分类号 H01L23/12;H01L21/60;H01L21/768;H01L23/13;H01L23/48;(IPC1-7):H01L23/12 主分类号 H01L23/12
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