发明名称 |
Integrated circuit architecture for e.g. EPROM |
摘要 |
The fast access integrated circuit memory architecture has a memory plane with bit lines (LBi,LBi'), connecting to memory cells (Ci,Ci'). Line input words (LMj) select the memory cells. There are n read circuits (CLK'). Each read circuit is connected to a cell part which is programmed and a part which is open. The bit read is 1 or 0 according to the programmed and open cells connected.
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申请公布号 |
FR2752324(A1) |
申请公布日期 |
1998.02.13 |
申请号 |
FR19960010176 |
申请日期 |
1996.08.08 |
申请人 |
SGS THOMSON MICROELECTRONICS SA |
发明人 |
ZINK SEBASTIEN;NAURA DAVID |
分类号 |
G11C7/06;G11C16/28;(IPC1-7):G11C7/00;G11C16/02 |
主分类号 |
G11C7/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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