| 摘要 |
PROBLEM TO BE SOLVED: To reduce the cost of a processor without providing a memory for interpolation by making a track memory into three banks and interlocking respective processing means and respective memory parts and controlling a control means for controlling mode shift in the consecutive recording. SOLUTION: A terminal 140 is an input terminal from an encoding data input/output block 11 and a terminal 142 is an input terminal from an error correction block 9. An address conversion circuit 13 mediates respective memory access requests and an address converted into the rear address of the memory and picture data before decoding are supplied. Codes 144 and 146 are the frame memories BK0 and BK1 in the TM area of the memory 17 and a code 148 is memory BK2 provided for interpolating a previous frame. The access of write/read into the three BK areas is supplied to respective processing blocks from CPU 19 as BK information and it is controlled by reflecting it on a high- order address. Output from SW150 is supplied to an encoding/decoding block, is expanded at the reproduction and is written into a VM area. |
