摘要 |
<p>A pseudo-random noise (PN) series generator which can change the timing of generation of a PN series arbitrarily and with no instantaneous cut-off of the output. At the time of system start, the whole period or a certain beginning length of a PN series generated by a tapped shift register (101, 201, 301) is stored into a RAM (102, 202, 302). The stored PN series is output from a position designated by an address signal. An address generator (105, 207, 307) for generating the address signal on an externally applied timing control signal (106, 208, 308) increments an address by one for each step from an initial value set by the timing control signal. In the case where a new timing different from the old timing is set by the timing control signal, the address is incremented or decremented instantaneously by a difference between the old timing and the new timing and a normal incrementing operation is thereafter started again. The thus generated address signal is applied to an address bus for the RAM, thereby making it possible to instantaneously change the timing of generation of a PN series output as required by the timing control signal. <IMAGE></p> |