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发明名称
PHASENVERRIEGELUNGSANORDNUNG FÜR JITTERREDUZIERUNG IN EINEM DIGITALEN MULTIPLEXSYSTEM
摘要
申请公布号
DE69128632(D1)
申请公布日期
1998.02.12
申请号
DE19916028632
申请日期
1991.07.09
申请人
TELEFONAKTIEBOLAGET L M ERICSSON, STOCKHOLM, SE
发明人
BLADH, MATS, S-146 00 TULLINGE, SE
分类号
H03L7/107;H04J;H04J3/06;(IPC1-7):H04J3/02
主分类号
H03L7/107
代理机构
代理人
主权项
地址
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