发明名称 Method for forming vertical polysilicon diode compatible with CMOS/BICMOS formation
摘要 A method for forming a diode for use within an integrated circuit, and a diode formed through the method. There is first provided a semiconductor substrate. There is then formed over the semiconductor substrate a dielectric layer. There is then formed upon the dielectric layer a first polysilicon layer, where the first polysilicon layer has a first dopant polarity and a first dopant concentration. There is then formed at least in part overlapping and at least in part in contact with the first polysilicon layer a second polysilicon layer. The second polysilicon layer has a second dopant polarity and a second dopant concentration, where the second dopant polarity is opposite to the first dopant polarity. A first portion of the second polysilicon layer overlapping and in contact within a first portion of the first polysilicon layer forms a junction diode. The method and the diode formed through the method are compatible with complementary metal oxide semiconductor (CMOS) integrated circuit fabrication methods and bipolar complementary metal oxide semiconductor (BiCMOS) integrated circuit fabrication methods.
申请公布号 US5716880(A) 申请公布日期 1998.02.10
申请号 US19970803467 申请日期 1997.02.20
申请人 CHARTERED SEMICONDUCTOR MANUFACTURING PTE LTD. 发明人 VERMA, PURAKH RAJ
分类号 H01L21/8249;H01L27/06;(IPC1-7):H01L21/823 主分类号 H01L21/8249
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