发明名称
摘要 <p>PURPOSE: To eliminate the need for exclusive control between processors by arranging packets in mixture in plural processors in a buffer of a data transfer processing unit while using a processor number in each packet as a read pointer and a write pointer. CONSTITUTION: A request publication control section 160 in arithmetic processors 100 to 103 adds a start source processor number 1000 and a packet number 1100 to a series of instruction packages sent from the processors 100 to 103. Then a buffer to be written based on the number 1100 is selected in data transfer processing units 130, 131, a buffer selection control section 1400 reads data from the buffer by using the start source processor number as a read pointer by the arrival of a final packet. The control section 1400 is controlled by using the start source processor as the read pointer and the write pointer and the data read from the buffer are stored in a request arrangement register 1300 when the final packet reaches. Then a request is started and packets are arranged in the buffer.</p>
申请公布号 JP2710587(B2) 申请公布日期 1998.02.10
申请号 JP19950147550 申请日期 1995.06.14
申请人 发明人
分类号 G06F15/163;G06F15/17;H04L12/70;(IPC1-7):H04L12/56 主分类号 G06F15/163
代理机构 代理人
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