| 摘要 |
PCT No. PCT/JP94/00339 Sec. 371 Date Dec. 11, 1995 Sec. 102(e) Date Dec. 11, 1995 PCT Filed Mar. 3, 1994 PCT Pub. No. WO94/20960 PCT Pub. Date Sep. 15, 1994A variable speed reproduction of speech from memory depending on the indication of a jog dial is accomplished by buffer memory (23) for speech sound and a jog dial (17) for controlling a read speed from this memory. Speech sound data is read out from the buffer memory (23) at a speed corresponding to the indication of the jog dial (17). The speech sound data is reproduced, independent of the jog dial (17), from a tape (13) and is written into the memory (23). A capstan motor drive circuit (18) detects the difference between the read address and the write address of the memory (23) and controls the reproduction speed of the sound speech data from the tape (13) in accordance with this difference. Since the read speed is directly controlled for the memory (23), no time delay exists between the speed command and the actual variable-speed reproduction. The address difference between write and read of the memory (23) is always monitored to keep the buffer from becoming empty so that continuous reproduction can be made, so that when the speech sound is edited, variable-speed continuous reproduction can be made for speech editing by the buffer memory (23) alone.
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