发明名称 |
Testable integrated circuit with reduced power dissipation |
摘要 |
<p>An integrated circuit includes a plurality of internal devices that are tested by setting the states of their data registers to respective levels, first forming a known initialization value and then a functional data value. All the data registers used for testing are coupled as one or more shift registers and by clocking data through a serial scan path, test stimuli can be shifted in and results shifted out. The scan path connections are provided in addition to the usual functional operation signal connections. During functional operation, the data transitions in the scan path signals are disabled to reduce the power dissipation associated with driving the scan path signals. <IMAGE></p> |
申请公布号 |
EP0822419(A1) |
申请公布日期 |
1998.02.04 |
申请号 |
EP19970305378 |
申请日期 |
1997.07.18 |
申请人 |
NOKIA MOBILE PHONES LTD. |
发明人 |
WRAPE, MICHAEL J.;UHARI, TOMMI |
分类号 |
G01R31/317;G01R31/3185;(IPC1-7):G01R31/318 |
主分类号 |
G01R31/317 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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