| 摘要 |
PROBLEM TO BE SOLVED: To provide a simplified computing device where the number of computers and manufacture cost are reduced by generating the coefficients of an error position polynomial expression and a syndrome value and executing a prescribed addition and multiplication processings through plural registers. SOLUTION: A coefficient input block 30 sequentially supplies the first output coefficientσi to MUX 37. An input coefficient is stored in registers R0-R3 by an input port 1 in an initial stage with a selection signal SEL. The output of a GF adder 33 is selected by an input port 0 in stages except for the initial stage. The output coefficientσi is initialized in R0-R3 and the coefficient input block 30 suppliesσi and the second output syndrome value Si to a GF multiplier 31. Here, the two input values are multiplied and they are supplied to a GF adder 33 and the coefficients in the registers are added. The result is stored in the registers through the input port 0 and the contents of the registers are sequentially updated. Thus, the coefficients of the error evaluation polynomial and the syndrome value are obtained.
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