发明名称 DATA TRANSMITTER-RECEIVER AND DATA TRANSFER SYSTEM
摘要 PROBLEM TO BE SOLVED: To improve the transmission efficiency by reducing the number of bits of a time stamp. SOLUTION: A network 10 is configured to transfer an isochronous packet without fail during transmission cycle started by a cycle start signal generated in response to a 1st timing signal for a period of 125μsec. A transmission station 12 generates an isochronous packet formed by adding a time stamp corresponding to a difference time between the 1st timing signal and the sampling timing to data obtained by sampling an analog signal in a prescribed sampling timing and the packet is written in a transmitter side FIFO with the 1st timing signal and sent to the network 10 from the FIFO by the cycle start signal. A reception station 13 writes the received packet to the receiver side FIFO with the cycle start signal and read from the FIFO with the 1st timing signal and the analog signal is reproduced on a time base.
申请公布号 JPH1032606(A) 申请公布日期 1998.02.03
申请号 JP19960200989 申请日期 1996.07.12
申请人 YAMAHA CORP 发明人 FUJIMORI JUNICHI;INAGAKI YOSHIHIRO;KURIBAYASHI YASUTAKA;OTANI YASUSHI;ABE TATSUTOSHI
分类号 H04L25/00;H04L12/70;(IPC1-7):H04L12/56 主分类号 H04L25/00
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