Image processing LSI circuit with image preprocessing, feature extraction and matching

摘要

There is disclosed a high-speed programmable image processing LSI circuit adaptable to image preprocessing, feature extraction, and matching, which includes a DMA transfer control portion (4) for DMA transfer which reads input data from an external memory to transfer the input data to data memories in the LSI circuit; a sequence control portion (8), an instruction memory (7), and an address generating portion (3) which control writing to and reading from the data memories in response to an instruction code; the DMA transfer control portion (4) accommodating a wait time caused during external data transfer to prevent the wait time from affecting instruction code control in the LSI circuit; SIMD type processing units arranged in parallel and connected to output lines of the data memories for completing the process steps of image processing in cooperation with a postprocessing portion which in turn provides an output signal (54) to the exterior and accommodates a wait time at this time.