发明名称 Semiconductor memory device
摘要 A plurality of static memory cells including CMOS flip-flops and switching MOS transistors are connected in series, thereby forming a memory cell unit in which one end of data reading is connected to bit lines. A series of the memory cell units are arranged, thereby forming a memory cell array. Reset terminals are provided for releasing cell data and causing the cell to function temporarily as a transfer gate of data.
申请公布号 US5715192(A) 申请公布日期 1998.02.03
申请号 US19950502947 申请日期 1995.07.17
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 HASEGAWA, TAKEHIRO;MASUOKA, FUJIO
分类号 G11C11/41;G11C11/40;G11C11/412;(IPC1-7):G11C11/34 主分类号 G11C11/41
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