| 摘要 |
A noise reduction circuit for use with video signals or image producing signals in which trailing and other image degrading phenomena are prevented by not using the noise reduction circuit for the edge of the motion picture portion on the image. The noise reduction circuit includes a subtractor 14 which outputs a difference signal E between input video signal VSi and delayed video signal VSd. ROM 18, a look-up table that forms the coefficient multiplier, outputs a corrected difference signal KE corresponding to the difference signal E from subtractor 14. At adder 12, corrected difference signal KE from ROM 18 is added to input video signal VSi, forming output video signal VSo processed by the noise reduction processing. However, when "H" level expansion video signal MEH,Y is output from vertical expansion circuit 42, the outputs of AND gates 24, 26 become null, and the output signal of ROM 18 becomes null.
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