发明名称 CAPACITIVE LOAD DRIVE CIRCUIT AND DISPLAY DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce power consumption by cutting a current flowing through gate resistance of an upper side insulation gate bipolar transistor (IGBT) by a switch in a period when plural outputs become low. SOLUTION: PMOS transistors QP1-QPn are connected between gate terminals and collector terminals of the upper side IGBT QT1-IGBT QTn of totem-pole connected IGBTs, and the gate terminals of respective PMOS transistors QP1-QPn are controlled by a common drive circuit. At a scan drive time, by applying a fixed voltage to the gate electrodes of the PMOS transistors QP1-QPn, the currents are made a constant current, and the currents flowing through lower side IGBTs Q1-Qn are limited. In the period performing the drive that all outputs Q1-On become low, the current flowing through the lower side IGBTs Q1-Qn is cut by making the gate electrodes of the PMOSs QP1-QPn a threshold value voltage or below. Thus, the current consumed in all low period when plural channels are constituted is made nearly zero.
申请公布号 JPH1026952(A) 申请公布日期 1998.01.27
申请号 JP19960181870 申请日期 1996.07.11
申请人 HITACHI LTD;HITACHI HARAMACHI SEMICONDUCTOR LTD 发明人 SHIINA KAZUHIRO;KAWAMOTO KOJI;MIURA MASAHITO;OURA HITOSHI;OZEKI SHOICHI
分类号 G09G3/20;H03K17/56 主分类号 G09G3/20
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