| 摘要 |
Disclosed is a circuit for protecting a semiconductor device from the static electricity by discharging static electricity. When a p+/n- diode of positive direction to VDD or a PMOS transistor is not usable because a voltage higher than VDD is applied, a vertical PNP transistor is connected to Vss and positive static electricity is discharged. Negative static electricity is discharged by using an n+/p- diode connected to Vss direction through a semiconductor substrate. Additionally, in case of a circuit to which either a voltage higher than VDD, or a voltage lower than Vss (=0[V]) is inputted, or outputted, a discharging path is formed with respect to negative static electricity by the operation of a vertical NPN bipolar junction transistor connected to VDD. Positive static electricity is discharged via a p+/n- diode connected to VDD.
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