Test signal generator having timing calibration circuit

摘要

A timing signal generator generates timing signals having a timing resolution higher than a reference clock signal and can measure a delay time in the timing signal generator with high accuracy by a loop oscillation method. The timing signal generator includes: a phase lock loop having a variable delay circuit which is formed of a plurality of delay elements connected in series wherein a delay time in the variable delay circuit is phase locked with a clock signal, a track hold circuit provided in the phase lock loop to transfer a phase lock control voltage to the phase lock loop in a phase lock mode and to temporarily hold the control voltage in a loop oscillation mode, a selector circuit to select a timing signal from a plurality of signals corresponding to the plurality of delay elements to produce the timing signal at a timing output, an input selector for selectively providing the clock signal to the phase lock loop during the phase lock mode and a returning pulse from the timing output during the loop oscillation mode, and a pulse injection circuit for starting an oscillation in the closed loop by injecting a pulse signal in the closed loop.