| 摘要 |
PROBLEM TO BE SOLVED: To provide a ferroelectric non-volatile memory cell which prevents a leakage current. SOLUTION: A ferroelectric non-volatile memory(FENVM) array is formed on an insulating layer 32 which is a part of a substrate. The insulating layer 32 contacts source/drain regions of a transistor in the memory array, and restrains the possibility of disturbance to data in a memory cell of the array to a low level in a state that a common bias is applied. Since the source/drain regions contact the insulating layer 32, the junction capacitance of the source/ drain regions is reduced. The read (access) and write times of the memory cell are shortened in comparison with a memory cell formed in a bulk substrate. A protect ring and other structures necessary for reducing the possibility of latch up are not required. In one embodiment, a field isolation region does not surround each active region of the transistor between memory cells. Therefore, a miniaturized memory cell may be provided on each stage. |
