发明名称 TAB TAPE SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To enable test of high precision at a high speed when test circumstance is deteriorated by increasing the length of a lead on a TAB tape in multipin structure. SOLUTION: Device halls 3a, 3b are opened in a resin tape 2, test pads 5 are arranged on the tape 2, and a wiring pattern 4 whose tip part is made an inner lead is formed. A semiconductor circuit chip 1a as a main chip is mounted on a device hole 3a, and an integrated circuit chip 1b for waveform shaping is mounted on a device hole 3b. A signal of an LSI tester is shaped by the integrated circuit 1b for waveform shaping, and test is performed by supplying a double phase clock wherein waveform deterioration and phase deviation are eliminated.
申请公布号 JPH1022327(A) 申请公布日期 1998.01.23
申请号 JP19960174530 申请日期 1996.07.04
申请人 NEC CORP 发明人 NAKAMOTO SATOSHI
分类号 G01R31/26;H01L21/60;H01L21/66;H01L23/495 主分类号 G01R31/26
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