发明名称 CONTROLLER FOR IC TEST SYSTEM
摘要 PROBLEM TO BE SOLVED: To immediately operate 1st and 2nd computers without waiting the completion of processing on the opposite side by separately performing access from the 1st and 2nd computers to an interface and a shared memory while using respective 1st and 2nd bus lines. SOLUTION: A 1st computer 21 and an interface 23 are connected by a 1st bus line 26A, and the 1st computer 21 and a shared memory 25 are connected by a 2nd bus line 26B. A 2nd computer 30 is connected through 1st and 2nd connectors 24A and 24B to these 1st and 2nd bus lines 26A and 26B. Thus, the independent 1st and 2nd bus lines 26A and 26B are provided to the interface 23 and the shared memory 25 so that the 1st and 2nd computers 21 and 30 can separately access the interface 23 and the shared memory 25.
申请公布号 JPH1021108(A) 申请公布日期 1998.01.23
申请号 JP19960173460 申请日期 1996.07.03
申请人 ADVANTEST CORP 发明人 KAWASAKI KUNIHIKO
分类号 G01R31/28;G06F11/22;G06F13/36 主分类号 G01R31/28
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