| 摘要 |
PROBLEM TO BE SOLVED: To provide a short test circuit with the small number of test terminals and with a short test time for the test of ROM and RAM incorporated in LSI. SOLUTION: A test clock is inputted from an external input terminal 301 and test data is inputted from the external input terminal 302. The test clock is counted by a counter 303 and test data is latched by a register 304. A RAM control circuit 305 generates a RAM and ROM address signal 306 for testing, a RAM and ROM precharge signal 307 and a RAM read/write signal 308, data of the register 304 is written in RAM 318 and, after that, ROM 319 and RAM 318 are read and the output of a coincidence circuit 320 is outputted to an external output terminal 323. Thus, RAM and ROM are tested. |
