发明名称
摘要 PURPOSE:To make it possible to reduce the occupation area of a substrate when a capacity member having the same capacity value is formed as well as to contrive improvement in density of a memory cell by a method wherein the capacity member formed on an interlayer insulating film is formed in the shape in which the side capacity component is larger than the plane capacitance component. CONSTITUTION:The wirings 4 and 6, to be connected to a transistor, are formed on a semiconductor substrate 1, an interlayer insulating film 7 covering said wirings 4 and 6 and a capacity member formed on the interlayer insulating film are provided, and the capacity member is formed in the shape in which the side capacity component becomes larger than the plane capacity component. Besides, the first capacity electrode 9, to be brought into contact with a capacity electrode contact 8, a capacity insulating film 10 covering the first capacity electrode 9, and the second capacity electrode 11 covering the capacity insulating film 10 are contained in the capacity member. As a result, the total capacity value of the capacity member becomes twice or more of the capacity value obtained when the capacity member is flatly formed on the surface of the semiconductor substrate 1, and the formation of almost vertical microscopic groove on the semiconductor substrate 1 is unnecessitated. Consequently, the substrate occupation area per memory cell can be reduced, and the memory cell can be formed easily.
申请公布号 JP2702121(B2) 申请公布日期 1998.01.21
申请号 JP19870043472 申请日期 1987.02.25
申请人 发明人
分类号 H01L27/04;H01L21/822;H01L21/8242;H01L27/10;H01L27/108 主分类号 H01L27/04
代理机构 代理人
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