发明名称 INTERRUPTION SIGNAL PROCESSING CIRCUIT, AND PROGRAMMABLE CONTROLLER
摘要 <p>PROBLEM TO BE SOLVED: To evade the danger of runaway of an object to be controlled or the like by releasing the holding state of a storage means by prescribed signals, holding computed data in a second register, and performing a prescribed processing in the case that the storage means is in a holding state thereafter. SOLUTION: The data on a frequency and a pulse number set to a master register 41 and a preloading register 42 are computed beforehand by an MPU 1 and transferred through a bus 5. When pulses for a number set to the master register 41 are outputted from a pulse generator 43, a counter 44 detects them and respectively supplies transfer request signals REQTR to the preloading register 42 and interruption signals INT to the MPU 1. Corresponding to it, the operation of the frequency and the pulse number to be set next is started in the MPU 1 and the data of the frequency and the pulse number held until then are preloaded and transferred to the master register 41 and held.</p>
申请公布号 JPH1011300(A) 申请公布日期 1998.01.16
申请号 JP19960162825 申请日期 1996.06.24
申请人 KEYENCE CORP 发明人 YUGUCHI TASUKU
分类号 G06F15/78;G05B15/02;G06F9/46;G06F9/48;(IPC1-7):G06F9/46 主分类号 G06F15/78
代理机构 代理人
主权项
地址