发明名称 CIRCUIT AND METHOD FOR ACCUMULATED DC COMPONENT DETECTION, CIRCUIT AND METHOD FOR SERIAL DIGITAL INTERFACE SIGNAL TRANSMISSION
摘要 PROBLEM TO BE SOLVED: To prevent the occurrence of a deteriorated signal pattern, such as consecutive identical codes for a long time in a serial digital interface device for a digital video signal or the like. SOLUTION: A scrambled NRZ-I signal 3a being a digital serial signal is fed to a counter circuit 41. The counter circuit 41 is incremented by one when a logic level of the scrambled NRZ-I signal 3a is logical 1, and the counter circuit 41 is decremented by one when the logic level of the scrambled NRZ-I signal 3a is logical 0, to detect an accumulated DC shift component 41a. The accumulated DC shift component 41a, detected by the counter circuit 31, is fed to a comparator circuit 42. The comparator circuit 42 compares the accumulated DC shift component 41a with a preset permissible shift, and when the accumulated DC component 41a exceeds the permissible shift, a flip-flop 43 provides an output of a DC component shift detection signal 4a.
申请公布号 JPH1013241(A) 申请公布日期 1998.01.16
申请号 JP19960165843 申请日期 1996.06.26
申请人 SONY CORP 发明人 UEDA MAMORU
分类号 H03M7/14;H04L25/49;H04N5/00 主分类号 H03M7/14
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