发明名称 TWO-LAYER CIRCUIT BOARD
摘要 PROBLEM TO BE SOLVED: To simplify the configuration of a two-layer circuit board, by connecting the wiring patterns of both its front and rear surfaces by solder plating layers made to grow in its through holes or via holes. SOLUTION: Preparing a two-layer CCL material obtained by depositing a Cu foil 4 on one surface of a polyimide tape 1, a bonding agent 2 is applied to the other surface of the tape 1 to laminate thereafter a Cu foil 3 thereon by rolling. Forming respectively a hole 4C in the position to form a device hole of the Cu foil 4 and holes 4D in the positions to form via holes of the Cu foil 4, the CCL material is machined thereafter to form a device hole 1A and via holes 1B therein. Forming respectively signal wiring patterns 3A on the Cu foil 3 and power supply and ground wiring patterns 4A on the Cu foil 4, solder resists 5A are applied thereafter to the via holes 1B to apply simultaneously the solder resists 5A to the wiring patterns 3A, 4A, too. Performing electric platings, solder plating layers are made to grow in the via holes 1B to connect the signal wiring patterns 3A with the power supply and ground patterns 4A. Thereby, simplifying the configuration of a two-layer circuit board.
申请公布号 JPH1012987(A) 申请公布日期 1998.01.16
申请号 JP19960159408 申请日期 1996.06.20
申请人 HITACHI CABLE LTD 发明人 YAMAGUCHI KENJI;ISHIDA YOSHIMITSU;YOSHIOKA OSAMU
分类号 H05K1/11;H05K3/34;H05K3/40;H05K3/42;H05K3/46;(IPC1-7):H05K1/11 主分类号 H05K1/11
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