| 摘要 |
PROBLEM TO BE SOLVED: To enable implementation of bus bar in a package provided with a plurality of electrode pads arrays near periphery of such integrated circuit chip as SOP(small outline package), DIP(dual inline package), QEP(quad flat package) and side bonded LOC(lead on chip). SOLUTION: A semiconductor device 1 comprises a conductor lead 6 applied with a first reference voltage, for example a power source electric potential, and a conductor lead 7 applied with a second reference voltage, such as the ground potential. Both the conductor leads comprise bus bars 6a, 6b, 7a and 7b assigned along arrays of a plurality of electrode pads a. In short, the bus bars of both conductor leads 6 and 7 are routed along a plurality of electrode pads arrays, for avoiding mutual interference. The bus bar is fixed to the surface of chip 2 with adhesive tapes 8a and 8b, and at a plurality of points, wire- bonded to the electrode pad 2a. |
