发明名称 INRUSH-CURRENT PREVENTING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To surely prevent an inrush-current upon recovery from instantaneous interruption of input voltage by turning an FET on through the operation of a feedback resistor and a capacitor, connected with the feedback winding of a transformer, while delaying by a time constant which is dependent on the feedback resistor and the capacitor. SOLUTION: After an FET Q2 has been turned off by interrupting an input voltage Vin through an input voltage detection control circuit 10 and then input voltage Vin has recovered, an input current being suppressed by a suppressing resistor R1 until the FET Q2 is turned on, is fed to the input winding N1 of a transformer T. At the same time, the FET Q2 is turned on through the operation of a feedback resistor R3 and a capacitor C3 connected with the feedback winding N3 of the transformer T, while being delayed by a time constant which is dependent on the feedback resistor R3 and the capacitor C3. According to the circuitry, an inrush current can be surely prevented upon recovery of the input voltage Vin from instantaneous interruption through operation of the FET Q2, the input voltage detection control circuit 10, the suppressing resistor R1 and the feedback resistor R3.
申请公布号 JPH1014246(A) 申请公布日期 1998.01.16
申请号 JP19960161848 申请日期 1996.06.21
申请人 MELS CORP 发明人 KITAMURA TETSUJI;WATANABE SHIGEO
分类号 H02M1/00;H02M3/28;H02M7/48 主分类号 H02M1/00
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