发明名称 Störsichere Schnittstellenschaltung
摘要 A failsafe interface circuit comprises at least one semiconductor switching circuit (1) with a first link terminal (2), a second link terminal (4) and a control terminal (6). To connect a first and second circuit (8, 10) attached to the first and second link terminal (2, 4), respectively, a potential difference between the control terminal (6) and one of the link terminals (2, 4) is raised above a predetermined threshold value. To avoid any flow of current from the second circuit (10) to the first circuit (8) or vice versa when the interface circuit is powered off, the maximum potential at the first and second link terminal (2, 4) is actively fed back to the control terminal (6) of the semiconductor switching circuit (1).
申请公布号 DE19628270(A1) 申请公布日期 1998.01.15
申请号 DE19961028270 申请日期 1996.07.12
申请人 TELEFONAKTIEBOLAGET L M ERICSSON, STOCKHOLM, SE 发明人 HEDBERG, MATS, HANINGE, SE
分类号 H03K19/007;H03K19/003;(IPC1-7):H03K19/094;H03K19/017 主分类号 H03K19/007
代理机构 代理人
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