| 摘要 |
PROBLEM TO BE SOLVED: To practically reduce instruction extension, to mitigate the limit of an I/O band width and to increase functions mountable to one substrate by respectively writing plural control codes corresponding to plural instructions to plural instruction decoders based on decoding information prepared at the time of assembling a source file. SOLUTION: An instruction code successive allocation assembler 4 outputs which instruction has been allocated to which instruction, to an instruction name-instruction code correspondence table 300 for indicating the correspondence relation of an instruction name and the instruction code. A control code generator 5 finds the control code corresponding to the instruction code based on the instruction name-instruction code correspondence table 300 and a virtual instruction set 400 for indicating the correspondence relation of the instructions and all the control codes physically realizable on the parallel processor 600 and outputs it to a decoding memory table 500. Then, the contents of the decoding memory table 500 are transferred to a decoding memory group (instruction decoder) prior to the activation of the instruction.
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