SRAM mit Flash-Rücksetzung für auswählbare E/A-Leitungen
摘要
A static random access memory having multiple I/Os includes a memory array (10) of memory cells (42) with columns that are selectively clearable as a function of the associated I/O. The columns are arranged in pairs (34) with each column in the pair (34) associated with the same I/O. A clear signal is input thereto on a line (28) and driven by a driver (30). The clear signal is only associated with the pairs (34) associated with a selected I/O. The remaining columns of memory cells associated with unselected I/Os are not cleared.
申请公布号
DE68928270(T2)
申请公布日期
1998.01.15
申请号
DE1989628270T
申请日期
1989.05.17
申请人
SGS-THOMSON MICROELECTRONICS, INC., CARROLLTON, TEX., US
发明人
MCCLURE, DAVID CHARLES, CABINET BALLOT-SCHMI, F-75116 PARIS, FR;LYSINGER, MARK A.,, TEXAS 75007, US