发明名称 |
Semiconductor memory device capable of reducing power consumption |
摘要 |
A reference voltage generated in a Vref1 generating circuit is supplied from a corresponding applied voltage selector to respective backgates of access transistors in each SRAM cell constituting a column which is selected by a column decoder. On the other hand, a substrate voltage generated in a Vbb generating circuit is supplied from a corresponding applied voltage selector to respective backgates of access transistors in each SRAM cell constituting a column which is not selected by the column decoder.
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申请公布号 |
US5708599(A) |
申请公布日期 |
1998.01.13 |
申请号 |
US19960691151 |
申请日期 |
1996.08.01 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
SATO, HIROTOSHI;KOZARU, KUNIHIKO |
分类号 |
G11C11/413;G11C11/418;G11C11/419;(IPC1-7):G11C11/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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