| 摘要 |
<p>A current memory for sampled analogue currents comprises a first, coarse, current memory cell (T1, C1, S1) and a second, fine, current memory cell (T2, C2, S2). The first current memory cell senses the input current during a first portion (ζla) of the first period of the clock cycle, while the second current memory cell senses the input current plus the current produced by the first current memory cell during a second portion (ζlb) of the first period of the clock cycle. The combined outputs of the first and second current memory cells is available during a second period (ζ2) of the clock cycle. The first current memory further comprises a voltage amplifier (2) which increase the effective gm of the memory transistor (T1) and holds the potential at the junction of the drain electrodes of transistors (T1 and T2) close to a virtual earth.</p> |
