| 摘要 |
When input signal IN rises to an "H" level, node N1 attain an "H" level, and output terminal OUT is charged to a level of VCC-VTH by n channel transistor. Capacitor is charged by the "H" level signal transmitted through inverters, and the charged potential is superimposed on output terminal OUT. When a short pulse is merged with input signal IN, RS flipflop is latched, and node N1 attains an "L" level, thereby discharging the voltage of the output terminal. When the output terminal attains an "L" level, NAND gate is opened and RS flipflop is reset, thereby raising the output terminal again to a boost voltage.
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