发明名称 Data processor with cache memory
摘要 A data processor, with high processing performance in many fields of application, having a selector 41 which enables a cache memory of direct map system to be selectively used as a built-in cache memory or a built-in RAM in order to realize a data processor which can perform high-speed processing by decreasing the number of abortions of the processing as much as possible when branch is predicted in the pipeline processing mechanism, and an FB register 61B which holds an address to be accessed so that cache memory or external storage (main storage 28) may be accessed when branch is not predicted in the pipeline processing mechanism and only a cache memory may be accessed but accessing to the main storage 28 may be prohibited when branch is predicted, wherein the main storage 28 can be accessed by the address held in the FB register 61B at the moment it becomes accessible.
申请公布号 US5708803(A) 申请公布日期 1998.01.13
申请号 US19960689115 申请日期 1996.07.30
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 ISHIMI, KOUICHI;SAITO, YUICHI
分类号 G06F9/38;G06F12/08;(IPC1-7):G06F9/00 主分类号 G06F9/38
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