| 摘要 |
<p>A system for optimally locating cells on the surface of an integrated circuit chip is presented herein. The system comprises constructing a plurality of neighborhoods containing elements positionally related to one another; initially evaluating the lowest level of region hierarchy; iteratively developing a logical one-dimensional preplacement of elements on said surface; performing an affinity driven discrete preplacement optimization; evaluating whether a highest level of regional hierarchy has been attained; iteratively performing a dispersion driven spring system to levelize cell density and an unconstrained sinusoidal optimization; executing a density levelizing procedure; iteratively optimizing while controlling element densities; removing element overlap; iteratively optimizing for desired spacing between elements, adjusting element spacing, and permuting elements; locating elements on grid lines; and iteratively performing a functional sieve crystallization.</p> |
