Central control method in communication system for data storage management

摘要

The method involves several significant hardware components of the central control (ZSB), which include a microprocessor (CPU) with e.g. 2 MB of write-read memory (DRAM) and a FLASH CARD, a clock generator (CL), a signalling and conference unit (SIU), and a peripheral controller (ELIC) having three bidirectional PCM-structured 2.048 kB/s connections. The peripherals (PSE) to be connected to the communication system for interface adaptation have different functional categories, according to which control data for individual lines or types of component are assigned to different areas of the DRAM.