| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a power semiconductor device and manufacture thereof which improves the latch up, without using the p<+> -type well region, simplifies the fabrication process and reduces the chip size. SOLUTION: A p<+> -type cathode ohmic contact region 27 is formed on the surface of a p<-> -type well region 19 between n<+> -type source junction regions 25. A p-type impurity region 24 having an impurity concn. lower thin that of the contact region 27 but higher that of the well region 19 is formed in the well region 19 so as to cover the bottom of the junction region 25 pattern.</p> |
