发明名称 VIDEO SIGNAL PROCESSING UNIT
摘要 <p>PROBLEM TO BE SOLVED: To allow the processing unit to be compatible with the NTSC system and the PAL system, to suppress the scale of circuit configuration and to prevent frequency interference by multiplying medium value data with each of color difference signal data, selecting data and adding data based on a clock pulse whose frequency is 14.1875MHz. SOLUTION: An R system processing block 21 multiplies medium value data with red component color difference signal data RY to respectively obtain Ra-Rc and Rd being color difference signal data. The data are given to a selection output circuit 211, from which the data are selected and outputted based on the output of a hexadecimal counter 23 receiving a clock pulse whose frequency is 14.1875MHz. Thus, the output value is similarly processed by modulation with a chrominance subcarrier whose frequency is 4.43MHz. In a B system processing block 22, similarly data BY are modulated by selection output circuits 221, 222. The two kinds of modulated data are added by an adder 24 to obtain chrominance carrier signal data whose frequency is 14,1875MHz. Thus, the scale of circuit configuration is suppressed and longitudinal stripe noise due to frequency interference is suppressed.</p>
申请公布号 JPH104561(A) 申请公布日期 1998.01.06
申请号 JP19970073631 申请日期 1997.03.26
申请人 SANYO ELECTRIC CO LTD 发明人 NAKAKUKI TOSHIAKI;WATANABE TORU
分类号 H04N11/04;H04N9/45;H04N9/64;H04N9/65;H04N9/68;(IPC1-7):H04N9/65 主分类号 H04N11/04
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