| 摘要 |
PROBLEM TO BE SOLVED: To shorten the processing time of a snap trace by reading a snap main cause from an everchip or a microprocessor, directly writing snap data in a trace memory and clearing the snap main cause from the everchip. SOLUTION: An event control circuit 7a adopts an output destination from a break main cause reading buffer as a data bus to the everchip 4 and the everchip 4 reads the break main cause. A trace control circuit 8a makes trace possible even at the time of a break by a forcible trace effective signal FTEN. Moreover, a control signal generating decoder 16a decodes the address EA0-15 of the everchip 4 and the reading and writing strobe signals MR and MW of monitor space so as to generate the signal. Thus, even at the time of an HDD device, etc., where interruption is frequently executed, for example, a snap trace processing is executed by breaking for a drastically short time. |
